Earlier this month, AMD launched its latest (and greatest) line of top-end Radeon RX 7900 XTX and XT GPUs based on the brand-new AMD RDNA 3 architecture. The AMD RDNA 3 is a new approach towards high-performance GPUs, it’s got quite a few firsts in the segment and is also a very measured and tactical move by AMD to take on the high-performance GPU market where Nvidia has some big guns with the GeForce RTX 4090 that sits right at the top at the moment.
While we are yet to receive the review samples from AMD (and we can’t wait to put the cards through a battery of strenuous tests), this article is focused on delving a bit deeper into the RDNA 3 architecture and the calls that AMD took to maximize gaming performance.
AMD takes the lead with the world’s first Chiplet design for a gaming GPU.
The chiplet approach is not entirely new for AMD, however, it is a first when it comes to GPU design. And the challenge of achieving the sweet spot where the decision to take the chiplet route is justified in every aspect was the key here for AMD. GPU architecture is a lot more complex (vs CPUs), given the need for much higher memory bandwidth and sensitivity to latency, AMD engineers and chip designers had to work a lot harder to make everything come together and perform at optimal levels.
Unlike conventional heterogeneous chip designs, with the Chiplet approach, AMD has split the GPU into two parts, the GCD ( Graphics Compute Die) and the MCD (Memory Compute Die). The GCD is based on a 5nm process node while the MCD uses a 6nm process node.
Why AMD took the chiplet call and why it seems like a smart choice.
As per AMD, the shrinking nodes are increasingly delivering lesser gains while the yields are also decreasing. Which means you need to spend a lot more for that additional performance jump. Which directly impacts and elevates the cost of production.
With the chiplet approach, AMD claims to have arrived at a smarter and optimal solution by using the right and more efficient process nodes for the GCD and the MCD. On the 5nm node, the GCD manages to pack in a lot more firepower without a bump in the die size or power consumption. While the MCD uses a more efficient 6nm node that allows for a more cost-efficient approach.
But what about the interconnect?
The biggest challenge that AMD faced when choosing the Chiplet route was to manage the bandwidth requirement along with tackling the latency issue. The interconnect was solved using a custom ultra-high bandwidth interface that AMD calls the Infinity fan out link interface that enables a staggering 5.3 TB/sec of throughput between the GCD and the MCDs.
Tackling the latency factor
The next critical problem related to the chiplet approach was to solve for the latency. AMD claims to have dealt with the latency factor by increasing the clock speeds. The GPU clock speeds were cranked up by 18% to achieve an overall drop in latency by 10% compared to the Navi 21 (AMd Radeon RX 6900 series).
A big jump in the graphics compute performance
The main graphics processor houser 48 WGPs (workgroup processors) in the Navi 31 as compared to 40 WGPs on Navi 21. And you still have two CUs (compute units) per WGP. So the total count of compute units have gone up from 80 in Navi 21 to 96 in Navi 31, a modest 20% bump. However, what has changed in a big way is the resources available for each CU. With the RDNA 3, each of the compute units gets twice the capability by having a pair each of ALUs and vector units.
Big boost in Ray Tracing performance
AMD had no choice but to bring some significant gains when it comes to Ray Tracing performance. With the RDNA 3, AMD has announced its second generation Ray Tracing Engine which the company claims improves ray tracing performance by up to 80%. Quite a tall claim, we’d only be able to test it out once we have the cards in our test center. The approach to achieve higher RT performance is based on a smarter way of getting things done rather than using brute force. All in a bid to make things more efficient. AMD has optimized its second-generation ray-tracing engine to extract more performance out of each ray by using early subtree culling along with hardware support for DXR Ray Flags which significantly reduces the required instruction count per loop. Thereby achieving higher efficiency on RT workloads.
Soham Raninga, Chief Editor – Digit with Dr. Lisa T. Su – Chief Executive Officer, AMD. At the AMD Radeon RX 7900 series launch event in Las Vegas.
We asked some tough (and some not-so-tough) questions during our QnA with AMD
We fielded a few questions to the team behind RDNA 3 and here’s what they had to say.
Digit: How much of a cost-benefit does the chiplet design bring in terms of % over the conventional monolithic approach?
Sam Naffziger (Senior Vice President and Corporate Fellow, AMD): I can’t give you the specifics on that, our Navi 21 was 520mm square, and to go to 5nm with our Navi 31 design, it would be about that size or a little bigger. And the yields on advanced technology node is going to be an expensive buy and by splitting it, its just a smarter way to design chips, especially as 6nm is very mature and highly optmized. The yield curves, there is an inflexion point, when you get to 400, 500 and 600mm square, the costs really take off.
Digit: Will we see the chiplet design approach filtering down the midrange cards?
Sam Naffziger (Senior Vice President and Corporate Fellow, AMD): Like I said, the yield curve is non linear and there is a point where chiplets aren’t of benefit. We are not talking about our future products but there is a point in our product line-up where a traditional design makes a better choice over modern designs.
Digit: How closely is AMD working with the game development houses to optimize game performance for RDNA 3, given the chiplet approach, will it need additional optimization on the development and support side?
Laura Smith (CVP, Graphics MNC and Product Management, Radeon Technologies Group): We are broadly working with them to take advantage of RDNA 3, they don’t really have to do anything additional from a support point of view, but we are working with them to tune software for RDNA 3 as a new architecture.
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Soham Raninga
Soham Raninga is the Chief Editor for Digit.in. A proponent of performance > features. Soham's tryst with tech started way back in Dec 1997, when he almost destroyed his computer, trying to make the Quake II demo run at >30FPS View Full Profile
