India’s semiconductor design industry is poised for significant growth, as the nation aspires to become a global powerhouse in chip design and manufacturing. Indian government’s strategic initiatives, such as the Design Linked Incentive (DLI) scheme and the Chips to Startup (C2S) program, are aimed at creating a fertile environment for innovation and development. However, the path to becoming a major player in the global semiconductor ecosystem is very complex, requiring a concerted effort from both the public and private sectors.
Cadence Design Systems, a global leader in electronic design automation (EDA) and semiconductor IP, is playing a pivotal role in this transformation. In an exclusive interview, Jayashankar Narayanankutty, Group Director, Cadence Design Systems, discusses the driving forces behind India’s semiconductor design growth, the impact of government initiatives like the DLI scheme, and how Cadence’s deep involvement in talent development and AI integration is shaping the future of semiconductor design in India. Edited excerpts follow:
India’s semiconductor design industry is rapidly growing due to the continued demand for semiconductors and electronics. Sectors such as data centres, automotive, communications, and energy provide significant opportunities for chip design, further driving industry expansion. India’s strategic push for self-reliance, emphasising domestic manufacturing and product innovation, alongside the government’s vision of a pivotal role in the global supply chain, and general awareness of the sector’s critical importance, is further fuelling the growth of the industry in India.
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The government’s initiatives, such as the Design Linked Incentive (DLI) scheme, aim to enhance domestic chip design capabilities and position India as a global leader. Growing the talent pool and developing a skilled workforce are crucial priorities for the government. Cadence is actively contributing to this vision by partnering with the Ministry of Electronics and Information Technology (MeitY) to train 85,000 engineers in VLSI design by 2027. Our involvement in the Chip to Startup program and other initiatives such as providing world-class EDA software to students is expected to help with the number of engineers being trained as well as their relevance and employability.
Moreover, Cadence’s investment in AI and machine learning (ML) will help significantly shorten engineers’ learning curves. These technologies enable individuals with varying experience levels to tackle complex tasks and accelerate the design cycle. AI and ML integration within our design tools not only helps junior engineers solve intricate problems but also addresses the growing complexity of semiconductor design.
The Design Linked Incentive (DLI) scheme will have a significant impact on both startups and by extension to established companies in India’s semiconductor ecosystem. The government aims to also create an investment-friendly environment to boost domestic manufacturing capabilities and reduce reliance on imports. Along with initiatives like Chip to Startup (C2S) and the Modified Special Incentive Package Scheme (MSIPS), the DLI is designed to nurture a comprehensive semiconductor ecosystem, enhancing both the design and manufacturing sectors.
These policy measures are tailored to the current industry landscape and will evolve as the industry develops. The DLI scheme will play a crucial role in advancing product development. Our software, accessible through the national EDA grid to startups participating in the DLI program, plays a vital role in this initiative. It provides these startups with advanced electronic design automation tools, thereby strengthening their product development capabilities. Through our support of the DLI initiative, we are contributing to the government’s goal of transforming India into a leading product nation.
Over the past 30 years, India has developed a robust talent pool in semiconductor design. Major semiconductor companies have established a substantial presence in India and are continuing to expand aggressively, attracted by the country’s skilled workforce and cost-effective solutions.
The government has acknowledged that getting trained and employable manpower is an area that needs attention and is working with industry players to understand how the gaps can be addressed in a holistic manner. Initiatives like the Chips to Startup (C2S) program are crucial in cultivating a new generation of chip designers with the practical skills needed for real-world projects. Strengthening the connection between academia and industry through collaborative research, internships, and guest lectures can bridge the gap between theoretical knowledge and practical experience.
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Revising the curriculum to include the latest advancements in semiconductors and to come up with course structures that are industry-relevant and current will be extremely vital. Additionally, we need to create awareness about the impactful career paths in semiconductors and chip design. Aspiring engineers should be made aware that a career in this industry is equally, if not more, rewarding and financially remunerative as software jobs.
Cadence recently collaborated with the All-India Council for Technical Education (AICTE) committee to craft the new curriculum for the undergraduate degree course in Electronics Engineering (VLSI). This updated curriculum aims to equip students with in-demand industry skills and guide the next generation of engineers across 120+ Indian universities. As part of this collaboration, Cadence will also train around 100 professors across India. Cadence has been a part of the government’s Special Manpower Development Program (SMDP) Phases I and II from the year of its establishment. The initiative was aimed at building the future talent pipeline. Cadence has been actively working with MeitY for the Chips to Startup program to provide EDA tools to several universities across India, aiming to realise the ambition of developing a pool of 85,000 trained chip design engineers by 2027.
Electronic Design Automation (EDA) tools are crucial in addressing the growing complexity of semiconductor designs. As chip designs become more intricate, EDA tools are essential for maintaining design efficiency, boosting productivity, and accelerating time-to-market. Cadence’s cutting-edge EDA tools significantly enhance design productivity, allowing companies to develop highly complex chips within shorter timelines and with stable design teams.
At Cadence, we are leading the way in incorporating AI-based techniques into our software. Our ongoing AI deployment integrates AI capabilities into our tools, enhancing their functionality and efficiency. By leveraging AI, we are able to provide next-generation productivity improvements, enabling our customers to tackle increasingly complex designs with greater ease. This focus on AI not only supports current design needs but also drives innovation in semiconductor technology.
The rise of AI and the proliferation of smart devices are major drivers of innovation and demand in chip manufacturing and design. Initially, AI’s impact was largely concentrated in data centres, but now we see a growing trend of integrating “intelligence” directly into edge devices and networks.
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As AI technology evolves, the complexity of the models being developed will require increasingly advanced chips. This creates a continuous cycle of innovation, where the demand for more powerful and efficient semiconductors will persist. In India, although the AI revolution is still in its nascent stages, the country is well-positioned to benefit from this trend. The need for advanced electronics will drive sustained growth in the semiconductor sector, with India potentially emerging as a significant player in this global landscape.
Since the 2000’s, Cadence has been collaborating with startups to nurture the semiconductor industry’s growth in India by empowering them with innovative business models, cutting-edge tools, and global expertise.
Cadence has made over 100 different tools (through bundles) available to startups and academia under the Chips2Startup (C2S) program. Cadence aligns with the Chip-in initiative overseen by Centre for Development of Advanced Computing (CDAC) of the Indian government, enabling universities to engage in both research and development for chip design while also fostering startup creation in this critical sector. Cadence has partnered with startup incubators like FABCi – IIT Hyderabad and Electropreneur Park in Delhi and Bhubaneswar to provide software, and guide and mentor semiconductor and electronics startups.
Cadence’s software is accessible through the national Electronic Design Automation (EDA) grid to all startups selected for the Design Linked Incentive (DLI) program. This integration supports startups across India in leveraging advanced EDA tools to enhance their product development capabilities. Cadence also facilitates networking opportunities for startups through its events, conferences, and customer forums.
However, despite these efforts, India still needs more homegrown product startups in the semiconductor sector. Most product ownership and intellectual property remain with multinational companies. To address this, we hope to see a rise in Indian companies that own and develop their semiconductor products. A comprehensive approach that encourages the development of local product companies will help India fully leverage its semiconductor industry potential and drive further innovation.
